Ansys does provide a licensing calculator that will do the math for you, but it assumes that you only have one solver license available.  If you have more than one solver license in addition to HPC licenses, the math changes. 

This blog post will go through a few example calculations to reveal what’s going on “under the hood” so that you can accurately determine how many parallel variations you can run under various licensing scenarios.

Here’s an overview of how the HPC licensing requirements are calculated.  Don’t worry, we’ll work through some examples to make these rules clear:

1. You get 1 parametric variation for free from the solver license, each parametric variation beyond that requires 8 HPC
2. You get 4 cores for free in each variation, but each core beyond that requires 1 HPC

Ansys HPC Licensing Example 1: 16 parallel parametric variations using 4 cores per variation

Our first scenario is running a parametric sweep with 16 variations solving in parallel.  Each variation will use 4 CPU cores.  Here’s how you’d enter this scenario into the Ansys license calculator:

Figure 1: Entry into Ansys license calculator for Example 1.

Now let’s do the math and see if we get the same result as the calculator.  Remember, this calculation assumes that you only have one solver license available.  We’ll go through a case where more than one solver license is available shortly.

Required Workgroup HPC licenses for Example 1:

= (16 variations – 1 solver license) * 8 HPC per variation + (4 cores – 4 cores for free)
* 1 HPC per core * 16 variations

= 15 variations * 8 HPC + 0

= 120 HPC

Because we are only using 4 cores per variation and those first 4 cores are free, the second term of the equation drops.  We have one solver license, and so that is subtracted from the number of parallel variations and we’re left with a requirement of 120 HPC licenses to run this simulation.  Does the Ansys calculator agree?

Figure 2: Example 1 result from Ansys licensing calculator.

It does!  Our calculation matches the HPC workgroup increments (also called pool licensing).  However, there is also the HPC pack licensing scheme, where each additional HPC pack unlocks a factor of four more CPU cores:

Figure 3: Map of CPU count to HPC Pack license requirement.

Unfortunately, the cores from each HPC pack cannot be split up across multiple runs.  We will have to introduce another set of equations to calculate the required number of HPC packs:

ParallelCoreCount = number of variations * (number of cores - 4 cores for free)

If ParallelCoreCount > 0:
    If ParallelCoreCount > 8:
        IntermediateNumPacks = CEILING( LOG2(ParallelCoreCount / 2) / LOG2(4) )
    else:
        IntermediateNumPacks = 1
else:
    IntermediateNumPacks = 0

NumPacks = IntermediateNumPacks + number of variations

If NumPacks >= 2:
    NumPacks = NumPacks - number of solvers

What a pain! Let’s try it out on our example to see if it works.

Required HPC Pack licenses for Example 1:

ParallelCoreCount = 16 variations * (4 cores – 4 cores for free) = 0
IntermediatePackCount = 0
NumPacks = 0 + 16 = 16
NumPacks = 16 – 1 solver

= 15 HPC Packs

In our example we are only requesting four cores per variation, and so the IntermediatePackCount is equal to zero. The final number of HPC packs is just the number of variations minus the number of solver licenses, which is one in this example. The final result is 15 HPC packs, which matches the Ansys calculator. This is the trade-off between HPC packs and HPC Workgroup licenses; Pack licensing allows you large-scale parallel capabilities on individual runs but is less flexible than Workgroup HPC licensing.

Before looking at what happens when you have more than one solver available, let’s do one more example to illustrate how the above calculations work.

Ansys HPC Licensing Example 2: 4 parallel parametric variations using 16 cores per variation.

In this example, we’ve simply reversed the number of parallel variations and the number of cores used per variation.  We now want to run 4 variations with 16 cores each instead of 16 variations with 4 cores each.  The total number of CPU cores used is still 16 * 4 = 64 CPUs, the same as Example 1.  Will the licensing requirement also be the same?  Let’s find out:

Figure 4: Entry into Ansys license calculator for Example 2.

Figure 4 shows how Example 2 is entered into the Ansy license calculator.  Now, for our hand calculations:

Required Workgroup HPC licenses for Example 2:

= (4 variations – 1 solver license) * 8 HPC per variation + (16 cores – 4 cores for free)
*1 HPC per core * 4 variations

=(3 variations * 8 HPC) + (12 cores * 1 HPC * 4 variations)

=24 HPC + 48 HPC

=72 HPC

The required number of workgroup licenses are much lower than before (from 120 to 72), even though the total number of CPUs is the same!  What about HPC Pack licenses?

Required HPC Pack licenses for Example 2:

ParallelCoreCount = 4 variations * (16 cores – 4 cores for free) = 48
IntermediatePackCount = CEILING( LOG₂(48 / 2) / LOG₂(4) ) = 3
NumPacks = 3 + 4 = 7
NumPacks = 7 – 1 solver

= 6 HPC packs

The number of required HPC packs is also dramatically reduced from 15 to 6 HPC packs.  Do our results agree with the Ansys calculator?

Figure 5: Example 2 result from Ansys licensing calculator.

The Ansys licensing calculator is clearly saving us a lot of tedious work.  But what happens if we have more than one solver license available in addition to our Ansys HPC licenses?

Example 3: 16 parallel parametric variations using 4 cores per variation AND 8 solver licenses.

This is the same scenario as Example 1, except that now we have a total of 8 solver licenses in addition to our Ansys HPC licenses.  There’s no way to enter this information into the Ansys license calculator, so we’ll have to do these calculations by hand:

Required Workgroup Ansys HPC licenses for Example 3:

= (16 variations – 8 solver licenses) * 8 HPC per variation + (4 cores – 4 cores for free)
* 1 HPC per core * 16 variations

=(8 variations * 8 HPC) + 0

=64 HPC

The additional solver licenses dropped the HPC requirements from 120 HPC to 64 HPC.  What about HPC packs?

Required HPC Pack licenses for Example 3:

ParallelCoreCount = 16 variations * (4 cores – 4 cores for free) = 0
IntermediatePackCount = 0
NumPacks = 0 + 16 = 16
NumPacks = 16 – 8 solvers

= 8 HPC packs

Again, only 4 CPUs are requested per core, and so IntermediatePackCount is zero. We see that the required number of HPC packs drops from 15 to 8.

Note that you don’t need to specify the number of solver licenses when submitting a job.  If Ansys cannot check out sufficient Ansys HPC licenses, it will automatically attempt to check out however many additional solver licenses are necessary to meet the licensing requirements.

Hopefully, this blog post has shed some light on the inner workings of Ansys HPC licensing!  Now that you’re armed with these equations, you ought to be able to predict the licensing requirements for any parametric simulation.

Published on:	April 4th, 2022
With:	Eric Miller & Aleksandr Gafarov
Description:	In this episode your host and Co-Founder of PADT, Eric Miller is joined by PADT’s electromagnetics expert Aleksandr Gafarov to discuss what’s new for HFSS and Maxwell in the latest release of Ansys. If you have any questions, comments, or would like to suggest a topic for the next episode, shoot us an email at podcast@padtinc.com we would love to hear from you!
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With 2022 R1, Ansys Electronics solutions continue to bring best-in-class technologies to address PCB, 3D IC package, EMI/EMC, thermal, cabling, and electromechanical design challenges with significant advancements in 5G, autonomous and electrification simulation. 

Join PADT’s electronics application engineer and HF/LF expert Alexandr Gafarov for a look at what’s new for electromagnetics simulation in Ansys 2022 R1. 

This presentation will include updates for: 

• HFSS

• EMIT

• Multiphysics Optimization

• Electronics Desktop

• And much more

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Or

“Failover feature ‘HFSS solver’ specified in license preferences is not available. Request name hfss_solve does not exist in the licensing pool. Feature has expired.”

Thankfully, as long as the new PPE licenses are installed and present on your license server, the fix is very simple. With Electronics Desktop open, simply navigate through Tools > Options > General Options from the top ribbon menu:

Then, under the General > Desktop Configuration section, make sure to enable ‘Use Electronics Pro, Premium, Enterprise product licensing.’

This tells any program run through Electronics Desktop to look for the new PPE licensing iterations rather than the older legacy format and is remembered across sessions. This change will need to be made once for each installation of the 2020R1, 2020R2, and 2021R1 versions of the electronics software, and has now been made the default setting for versions 2021R2+.

In Ansys 2021 R2, Ansys HFSS continues to deliver groundbreaking technologies to address 3D IC package design challenges as well as advancements in 5G and autonomous simulation.

Join PADT’s Electronics Application Engineer and high frequency (HF) simulation expert Aleksandr Gafarov for a look at the latest enhancements made to Ansys HFSS, as well as other HF tools in Ansys 2021 R2. This includes an in-depth look at updates made for:

• HFSS
• Signal & Power Integrity
• EMIT
• Q3D
• And much more

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So, what is Electronics Reliability and what physics am I referring to? Great question, and I’m glad you asked – I’d like to run through some examples of each physics and their typical use-case / importance, as well as where Ansys fits in. Of course, real life is a convoluted Multiphysics problem in most cases, so having the capability to accommodate and link many different physics together is also an important piece of this puzzle.

Running down the list, we should perhaps start with the most obvious category given the name – Electrical Reliability. In a broad sense, this encompasses all things related to electromagnetic fields as they pertain to transmission of both power and signals. While the electrical side of this topic is not typically in my wheelhouse, it is relatively straightforward to understand the basics around a couple key concepts, Power Integrity and Signal Integrity.

Power integrity, as its name suggests, is the idea that we need to maintain certain standards of quality for the electrical power in a device/board/system. While some kinds of electronics are robust enough that they will continue to function even under large variations in supplied voltage or current, there are also many that rely on extremely regular power supplies that only vary above certain limits or within narrow bounds. Even if we’re looking at a single PCB (as in the image below), in today’s technological environment it will no doubt have electrical traces mapped all throughout it as well as multiple devices present that operate under their own specified electrical conditions.

If we were determined to do so, we could certainly measure trace lengths, widths, thicknesses, etc., and make some educated guesses for the resulting voltage drops to individual components. However, considerably more effort would need to be made to account for bends, corners, or variable widths, and that would still completely neglect any environmental effects or potential interactions between traces. It is much better to be able to represent and solve for the entire geometry at once using a dedicated field solver – this is where Ansys SIwave or Ansys HFSS typically come in, giving us the flexibility to accurately determine the electrical reliability, whether we’re talking about AC or DC power sources.

Signal integrity is very much related, except that “signals” in this context often involve different pathways, less energy, and a different set of regulations and tolerances. Common applications involve Chip-signal modeling and DDRx virtual compliance – these have to do with not only the previous general concerns regarding stability and reliability, but also adherence to specific standards (JEDEC) through virtual compliance tests. After all, inductive electromagnetic effects can still occur over nonconductive gaps, and this can be a significant source of noise and instability in cases where conductive paths (like board traces or external connections) cross or run very near each other.

Whether we are looking at timings between components, transition times, jitter, or even just noise, HFSS and SIWave can both play roles here. In either case, being able to use a simulation environment to confirm that a certain design will or will not meet certain standards can provide invaluable feedback to the design process.

Other relevant topics to Electrical Reliability may include Electromagnetic Interference (EMI) analysis, antenna performance, and Electrostatic Discharge (ESD) analysis. While I will not expand on these in great detail here, I think it is enough to realize that an excellent electrical design (such as for an antenna) requires some awareness of the operational environment. For instance, we might want to ensure that our chosen or designed component will adequately function while in the presence of some radiation environment, or maybe we would like to test the effectiveness of the environmental shielding on a region of our board. Maybe, there is some concern about the propagation of an ESD through a PCB, and we would like to see how vulnerable certain components are. Ansys tools provide us the capabilities needed to do all of this.

The second area of primary interest is Thermal Reliability, as just about anyone who has worked with or even used electronics knows, they generate some amount of heat while in use. Of course, the quantity, density, and distribution of that heat can vary tremendously depending on the exact device or system under question, but this heat will ultimately result in a rise in temperature somewhere. The point of thermal reliability basically boils down to realizing that the performance and function of many electrical components depends on their temperature. Whether it is simply a matter of accounting for a change in electrical conductivity as temperature rises or a hard limit of functionality for a particular transistor at 150 °C, acknowledging and accounting for these thermal effects is critical when considering electronics reliability. This is a problem with several potential solutions depending on the scale of interest, but generally we cover the package/chip, board, and full system levels. For the component/chip level, a designer will often want to provide some package level specs for OEMs so that a component can be properly scoped in a larger design. Ansys Icepak has toolkits available to help with this process; whether it is simplifying a 3D package down to a detailed network thermal model or identifying the most critical hot spot within a package based on a particular heat distribution. Typically, network models are generated through temperature measurements taken from a sample in a standardized JEDEC test chamber, but Icepak can assist through automatically generating these test environments, as below, and then using simulation results to extract well defined J_B and J_C values for the package under test.

On the PCB level of detail, we are likely interested in how heat moves across the entire board from component to component or out to the environment. Ansys Icepak lets us read in a detailed ECAD description for said PCB and process its trace and via definitions into an accurate thermal conductivity map that will improve our simulation accuracy. After all, two boards with identical sizing and different copper trace layouts may conduct heat very differently from each other.

On the system level of thermal reliability, we are likely looking at the effectiveness of a particular cooling solution on our electronic design. Icepak makes it easy to include the effects of a heat exchanger (like a coldplate) without having to explicitly model its computationally expensive geometry by using a flow network model. Also, many of today’s electronics are expected to constantly run right up against their limit and are kept within thermal spec by using software to throttle their input power in conjunction with an existing cooling strategy. We can use Icepak to implement and test these dynamic thermal management algorithms so that we can track and evaluate their performance across a range of environmental conditions.

The next topic that we should consider is that of Mechanical Reliability. Mechanical concepts tend to be a little more intuitive and relatable due to their more hands-on nature than the other two, though the exact details behind the cause and significance of stresses in materials is of course more involved. In the most general sense, stress is a result of applying force to an object. If this stress is high compared to what is allowed by a material, then bad things tend to happen – like permanent deformation or fracture. For electronic devices consisting of many materials, small structures, and particularly delicate components, we have once again surpassed what can be reasonably accomplished with hand calculations. Whether we are looking at an individual package, the integrity of an entire PCB, or the stability that a rigid housing will provide to a set of PCBs, Ansys has a solution. We might use Ansys Mechanical to look at manufacturing allowances for the permissible force used while mounting a complicated leaded component onto a board, as seen below. Or maybe, we will use mechanical simulation to find the optimal positioning of leads on a new package such that its natural vibrational frequencies are outside normal ambient conditions.

At the PCB level, we face many of the same detail-oriented challenges around representing traces and vias that have been mentioned for the electrical applications. They may not be quite as critical and more easily approximated in some ways, but that does not change the fact that copper traces are mechanically quite different from the resin composites often used as the substrate (like FR-4). Ansys tools like Sherlock provide best in class PCB modeling on this front, allowing us to directly bring in ECAD models with full trace and component detail, and then model them mechanically at several different levels depending on the exact need. Automating a materials property averaging scheme based on the local density of traces may be sufficient if we are looking at the general bending behavior of a board, but we can take it to the next level by explicitly modeling traces as “reinforcement” elements. This brings us to the level of detail where we can much more reliably look at the stresses present in individual traces, such that we can make good design decisions to reduce the risk of traces peeling or delaminating from the surface.

Beyond just looking at possible improvements in the design process, we can also make use of Ansys tools like LS-DYNA or Mechanical to replicate testing or accident conditions that an existing design could be subjected to. As a real-world example, many of us are all too familiar with the occasional consequences of accidentally dropping our smart phones – Ansys is used to test designs against these kind of shock events, where impact against a hard surface can result in high stresses in key locations. This helps us understand where to reinforce a design to protect against the worst damage or even what angle of impact is most likely to cause an operational failure.

As the finale for all of this, I come back to the first comment of reality being a complex Multiphysics problem. Many of the previous topics are not truly isolated to their respective physics (as much as we often simplify them as such), and this is one of the big ways in which the Ansys ecosystem shines: Comprehensive Multiphysics. For the topic of thermal reliability, I simply stated that electronics give off heat. This may be obvious, but that heat is not just a magical result of the device being turned on but is instead a physical and calculable result of the actual electrical behavior. Indeed, this the exact kind of result that we can extract from one of the relevant electronics tools. An HFSS solution will provide us with not only the electrical performance of an antenna but also the three-dimensional distribution of heat that is consequently produced. Ansys lets us very easily feed this information into an Icepak simulation, which then has the ability to give us far more accurate results than a typical uniform heat load assumption provides.

If we find that our temperatures are particularly high, we might then decide to bring these results back into HFSS to locally change material properties as a function of temperature to get an even more accurate set of electrical results. It could be that this results in an appreciable shift in our antenna’s frequency, or perhaps the efficiency has decreased, and aspects of the design need to be revisited. These are some of the things that we would likely miss without a comprehensive Multiphysics environment.

On a more mechanical side, the effects on stress and strain from thermal conditions are very well known and understood at this point, but there is no reason we could not use Ansys to bring the electrical alongside this established thermal-mechanical behavior. After all, what is a better representation of the real physics involved than using SIwave or HFSS to model the electrical behavior of a PCB, bringing those result into an Icepak simulation as a heat load to test the performance of a cooling loop or heat sink, and then using at least some of those thermal results to look at stresses through not only a PCB as a whole but also individual traces? Not a whole lot at this moment in time, I would say.

The extension that we can make on these examples, is that they have by and large been representative cases of how an electronics device responds to a particular event or condition and judging its reliability metrics based on that set of results, however many physics might be involved. There is one more piece of the puzzle we have access to that also interweaves itself throughout the Multiphysics domain and that is Reliability Physics. This is mostly relevant to us in electronics reliability for considering how different events, or even just a repetition of the same event, can stack together and accumulate to contribute towards some failure in the future. An easy example of this is a plastic hinge or clip that you might find on any number of inexpensive products – flexing a thin piece of plastic like in these hinges can provide a very convenient method of motion for quite some time, but that hinge will gradually accumulate damage until it inevitably cracks and fails. Every connection within a PCB is susceptible to this same kind of behavior, whether it is the laminations of the PCB itself, the components soldered to the surface, or even the individual leads on a component. If our PCB is mounted on the control board of a bus, satellite, or boat, there will be some vibrations and thermal cycles associated with its life. A single one of these events may be of much smaller magnitude and seemingly negligible compared to something dramatic like a drop test, and yet they can still add up to the point of being significant over a period of months or years.

This is exactly the kind of thing that Ansys Sherlock proves invaluable for: letting us define and track the effect of events that may occur over a PCB’s entire lifecycle. Many of these will revolve around mechanical concepts of fatigue accumulating as a result of material stresses, but it is still important to consider the potential Multiphysics origins of stress. Different simulations will be required for each of mechanical bending during assembly, vibration during transport, and thermal cycling during operation, yet each of these contributes towards the final objective of electronics reliability. Sherlock will bring each of these and more together in a clear description of which components on a board are most likely to fail, how likely they are to fail as a function of time, and which life events are the most impactful.

Really, what all of this comes down to is that when we design and create products, we generally want to make sure that they function in the way that we intend them to. This might be due to a personal pride in our profession or even just the desire to maximize profit through minimizing the costs associated with a component failure, however at the end it just makes sense to anticipate and try to prevent the failures that might occur under normal operating conditions.

For complex problems like electronics devices, there are many physics all intimately tied together in the consideration of overall reliability, but the Ansys ecosystem of tools allows us to approach these problems in a realistic way. Whether we’re looking at the electrical reliability of a circuit or antenna, the thermal performance of a cooling solution or algorithm, or the mechanical resilience of a PCB mounted on a bracket, Ansys provides a path forward.

If you have any questions or would like to learn more, please contact us at info@padtinc.com or visit www.padtinc.com.

With signal and power integrity (SI & PI) analysis products, users can mitigate many electrical and thermal issues affecting printed circuit boards such as electromagnetic interference, crosstalk, overheating, etc. Ansys integrated electromagnetics and circuit simulation tools are essential for designing high-speed serial channels, parallel buses, and complete power delivery systems found in modern high-speed electronic devices.

Leverage the simulation capability from Ansys to solve the most critical aspects of your designs. Join PADT’s Electronics expert and application engineer Aleksandr Gafarov for a detailed look at what is new for SI & PI in Ansys 2021 R1, including updates available within the following tools:

• SIwave – Granta support & differential time domain crosstalk

• Q3D – Uniform current terminals

• Circuits – Network data explorer & SPISim

• HFSS 3D – Parallel meshing, encrypted 3D components & IC workflow improvements

• Electronics Desktop – Ansys cloud, Minerva & optiSLang integration

• And much more

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If this is your first time registering for one of our Bright Talk webinars, simply click the link and fill out the attached form. We promise that the information you provide will only be shared with those promoting the event (PADT).

You will only have to do this once! For all future webinars, you can simply click the link, add the reminder to your calendar and you’re good to go!

AEDT Circuit also provides an easy way to create and simulate planar structures such as microstrip, stripline, coupled lines, co-planar strips, co-planar waveguides, and other Printed Circuit Board (PCB) elements which can then be converted into a physical layout of the PCB. In this blog a simple workflow is explained to generate and model a planar structure in Circuit, then export the circuit model to HFSS 3D layout and HFSS for further analysis.

Define your substrate:

After inserting a Circuit Design, right-click on Data under project tree, choose Add Substrate Definition. This brings you to Substrate Defintion window that gives you many optios of substate types. You can choose the type of substarte you need and enter the dielectric and trace metalization information as shown in Figure 1. This substrate is used in calucalation of line impedances.

(a)

(b)

Figure 1. (a) Substrate Definition options of substrate types, (b) the definition of strapline used in this blog.

Define your stackup:

The stackup in Circuit is very similar to the stackup in HFSS 3D Layout. Please note that the definition of substrate is not automatically transferred to the stackup. The stackup needs to be defined by the user. Select the Schematic tab and from the top banner choose Stackup. Then define each layer. This stackup will be used in creating the layout and transferring it to HFSS 3D Layout.  Figure 2 shows the stackup used for the FR4 substrate that was defined in Figure 1(b).

Figure 2. Stackup definition that will be used to transfer the layout to HFSS 3D Layout.

Create the circuit:

Circuit provides a large selection of component libraries. To see the Component Libraries, click on View and check Component Libraries. In the Component Libraries window look for Distributed and expand it. Under this category you see different types of PCB structures. We will use Stripline library. Expanding Stripline library there are various categories, including Transmission Lines. We need Transmission Line Physical Length component, as we would like to use pieces of transmission line to create an ideal branch line coupler. You notice by hovering the cursor on the name of the component a small information windows shows the symbol and information about the component, alternatively you can right-click on the name of the component and choose “View Component Help” to get to the complete help page about the component. Once a component is selected and placed in the circuit it will also appear under the Project Components list at the bottom of the Component Libraries list. This provides a quick way to reuse them (Figure 3).

Figure 3. (a) Component Libraries, (b) Project Components and information window.

Let’s choose a physical length transmission line and place it on the schematic window. By double clicking on the symbol the Properties window opens and can be modified. Explicit values or parameters can be used to define the line properties.

Are you starting to calculate the line impedance to figure out the dimensions? Wait, there is a tool here that helps you do that. Click on TRL to open the line calculator. The line can be synthesized based on its impedance and electrical size by choosing the correct frequency and clicking on Synthesize (Figure 4). Using physical length transmission lines (50 and 35 ohms) and Tee lines and 4 ports I created an ideal branch line coupler (Figure 5). I ran a frequency analysis to make sure the circuit is working properly.

Before moving on to export the layout to HFSS 3D layout we can do one more step. To keep the substrate definition and reuse it layer, click on File->Save As Technology File. This would save the definition of stripline substrate in the personal library. Next step is to export the layout to HFSS 3D layout.

Figure 4. Properties and TRL windows.

Figure 5. Branch line coupler schematic.

Export to HFSS 3D Layout:

Under Schematic tab, click on Layout, or from the top menu choose Circuit->Layout Editor. Notice that this layout editor is very similar to the HFSS 3D Layout window. Click Ctrl+A, to select everything. Then choose Draw form the top banner and click on Align MW Ports (Figure 6), notice that other tools are also available under Draw, such as Sanitize Layout and Geometry Healing. You might need to do a bit more corrections and cleaning before exporting the layout. Before exporting the geometry, you can also check the HFSS Airbox using Layout->Draw HFSS Airbox.

Figure 6. Aligning ports.

You may change the orientation to Isometric for a better view of the box (Figure 7).

Figure 7. Layout editor in Isometric orientation, showing the HFSS airbox.

Make sure everything is still selected or select them with Ctrl+A, then under Edit, choose Copy to HFSS 3D Layout.  Now an HFSS 3D Layout design is created. Open the design. There might be a few things you like to change. Expand the ports, the name of the ports might have changed. You also note that the ports are of Gap type. You can select the port and in the Properties window, under HFSS click on Gap and choose the Wave port. Just note that the wave port cannot be internal to the design. You might need to adjust the air box size or create PEC port caps in HFSS later.

The second point to consider is about the parameters defined in Circuit. Remember that we defined W35 and W50 as the line widths in Circuit. The parameter are transferred but several local variables are also created based on them. For example click on the 50 ohm line. The width is now shown as a new parameter. You can see the complete list of parameters that are created by choosing HFSS 3D Layout->Design Parameters. Under the Parameters Default you still see W35 and W50, but moving to Local Variables tab you see the parameters created based on the Parameters Default.

Figure 8. Properties window.

Export to HFSS:

Any HFSS 3D Layout design can be exported to HFSS. Click on Analysis from the project three. Right-click and Add HFSS Solution Setup (Figure 9). There is no need to run this analysis. It just needs to be created. Right-click on the HFSS Setup that was just created, select Export->HFSS Model (Figure 10). Select the name and location for this file. Open this file and examine the model. Notice that the parameters are not transferred to HFSS model, this is because all parts of the model are imported (Figure 11). The default ports (Gap ports) appear as lumped port. If you changed the Gap ports to Wave ports in HFSS 3D Layout, it is now the time to add the PEC port caps or change the airbox to make sure ports are not internal to the model.

Figure 9. Adding HFSS solution setup.

Figure 10. Exporting the layout to an HFSS model.

Figure 11. HFSS model.

It is important to note that the type of analysis in Circuit is different than HFSS which will lead to slightly different result (Figure 12), which is expected and emphasizes the value of simulating structures in a full-wave field simulator like HFSS.

(a)

(b)

Figure 12. (a) Branch-line coupler S parameters from Circuit model, (b) the imported HFSS branch-line coupler S parameters.

Conclusion

This was a short blog showing the workflow for importing PCB and planar designs from AEDT Circuit to HFSS 3D Layout and HFSS. The workflow is a good method to quickly create the HFSS model of a planar structure.

If you would like more information related to this topic or have any questions, please reach out to us at info@padtinc.com.

Published on:	February 26th, 2021
With:	Eric Miller & Aleksandr Gafarov
Description:	In this episode your host and Co-Founder of PADT, Eric Miller is joined by PADT’s Electronics Application Engineer Aleksandr Gafarov for a look at what’s new in this electromagnetics release. When it comes to high frequency electromagnetics, Ansys 2021 R1 delivers a plethora of groundbreaking enhancements. Ansys HFSS Mesh Fusion enables simulation of large, never before possible electromagnetic systems with efficiency and scalability. If you have any questions, comments, or would like to suggest a topic for the next episode, shoot us an email at podcast@padtinc.com we would love to hear from you!
Listen:
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@ANSYS #ANSYS

When it comes to high frequency electromagnetics, Ansys 2021 R1 delivers a plethora of groundbreaking enhancements. Ansys HFSS Mesh Fusion enables simulation of large, never before possible electromagnetic systems with efficiency and scalability. This release also allows for encrypted 3D components supported in HFSS 3D Layout for PCBs, IC packages and IC designs to enable suppliers to share detailed 3D component designs for creating highly accurate simulations.

Join PADT’s Lead Electromagnetics Engineer and high frequency expert Michael Griesi for a presentation on updates made to the Ansys HF suite in the 2021 R1 release, including advancements for:

• Electronics Desktop

• HFSS

• Circuits

• EMIT

• And Much More

Register Here

If this is your first time registering for one of our Bright Talk webinars, simply click the link and fill out the attached form. We promise that the information you provide will only be shared with those promoting the event (PADT).

You will only have to do this once! For all future webinars, you can simply click the link, add the reminder to your calendar and you’re good to go!